Design and Implementation of MIL-STD-1553B RT Subsystem
Author(s) : CHANG-HOON CHO, DONG-SEONG KIM, JAE-MIN LEE, SEUNG-HAN KIM
Abstract
In this paper, the MIL-STD-1553B RT(Remote Terminal) subsystem based on FPGA and IP Core was implemented. Proposed system integrate CPU, ASIC, and peripheral circuits of the MIL-STD-1553B system on one chip. Through this, scalability of the MIL-STD-1553B system can be enhanced. For verifying proposed FPGA based the MIL-STD- 1553B system, simulation environment was constructed with the MIL-STD-1553B tester and test software for identifying electrical characteristics and data communication functions. Simulation results show that proposed system can be interfaced with the MIL-STD-1553B data bus and advantageous in manufacturing cost reduction because of its scalability
Full Paper PDF
